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Valued Contributor III
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Reflexces XpressGX5-LP SE

We have the PCIE Board XpressGX5-LP SE with Startix V. 

https://www.reflexces.com/products/boards/fpga-boards/xpressgx5-lp-se 

 

 

I create QSYS system based on the Altera example QSYS project for Stratix V PCIE. 

But this project is not working. 

 

 

It happens that PCIE LTSSM = 0x00 (DETECT.Quiet). 

Or is that PCIE LTSSM = 0x01 (DETECT.Active). 

Or is that PCIE LTSSM = 0x00 -> 0x01 -> 0x00 -> 0x01 -> 0x00 ... . 

Or sometimes PCIE LTSSM = 0x0F (L0 - works fine). 

Moreover, these results may give one and the same sof-file (reprogramm the same sof-file). 

All constrains described and TimeQuest not report an error. 

 

 

Reflex support says that their project from flash works and they will not help us. 

What to do? 

Any help me?
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Valued Contributor III
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Couldn't say for certain if the problem is the board itself or the problem is PORTING.  

It's hard to clear up.  

Inquiring the board manufacturer directly will be highly recommended. Perhaps the manufacturer will provide you with some related examples.
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Valued Contributor III
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Has Reflex ces given you example code? Does this run without problems?

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Valued Contributor III
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Reflex do not given me example code. 

They sent me archive with manuals, with schematics, with utils for reprogramm flash, and flash-image *.rbf file for restore their factory image.  

In the flash of Board there is example design for test PCIE. 

 

I have two personal computer with pcie. 

1. When I start PC with this flash example design in first PC, the Board not detect in Windows success. 

(Board in pcie gen2 x16 not detect, and Borad in pcie gen2 x4 (x16 size) not detect). 

2. When I start PC with this flash example design in another PC, the Board detect in Windows success. 

 

In the archive there is DEMO test EXE.  

This demo is useless as it does nothing. 

When the key Start is pressed, nothing happens. 

You can see screenshot of this EXE. 

https://www.alteraforum.com/forum/attachment.php?attachmentid=12365  

 

 

 

In response to my letter, Reflex suggest to use paid IP Core from PLDA - QuickPCIE. 

After my message in PLDA, PLDA said they stopped selling QuickPCIE Core for Altera with 2014, including evaluation version!!! 

 

After this Reflex is said that then I need to use free HARD IP from Altera. 

But support Reflex is not engaged in the HARD IP from Altera. 

 

A vicious circle.
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Valued Contributor III
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--- Quote Start ---  

Reflex do not given me example code. 

They sent me archive with manuals, with schematics, with utils for reprogramm flash, and flash-image *.rbf file for restore their factory image.  

In the flash of Board there is example design for test PCIE. 

 

I have two personal computer with pcie. 

1. When I start PC with this flash example design in first PC, the Board not detect in Windows success. 

(Board in pcie gen2 x16 not detect, and Borad in pcie gen2 x4 (x16 size) not detect). 

2. When I start PC with this flash example design in another PC, the Board detect in Windows success. 

 

In the archive there is DEMO test EXE.  

This demo is useless as it does nothing. 

When the key Start is pressed, nothing happens. 

You can see screenshot of this EXE. 

http://www.alteraforum.com/forum/attachment.php?attachmentid=12365&stc=1  

 

 

 

In response to my letter, Reflex suggest to use paid IP Core from PLDA - QuickPCIE. 

After my message in PLDA, PLDA said they stopped selling QuickPCIE Core for Altera with 2014, including evaluation version!!! 

 

After this Reflex is said that then I need to use free HARD IP from Altera. 

But support Reflex is not engaged in the HARD IP from Altera. 

 

A vicious circle. 

--- Quote End ---  

 

 

As far as I know, Terasic has DE5-Net Board which is also with Stratix V FPGA: Altera Stratix® V GX FPGA (5SGXEA7N2F45C2).  

You may download the CD-ROM at this link: http://www.terasic.com/downloads/cd-rom/de5-net/ 

and refer to their PCIE demo codes 

PCIe_Fundamental 

PCIe_ImageProcess 

You can look into their framework and compare it with your own framework. Perhaps in this way, you can find out your problem.
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