Remote System Update for Cyclone 10 LP with UART IP core and NIOS2 softcore

[Joda]

Hi fellows,

I want to reconfigure the Cyclone 10 LP evaluation board by utilizing the Remote System Update (RSU) IP core. The programming file is arranged according to the picture below.

I am able to trigger the reconfiguration with the NIOS2 softcore.

Now the next step is to transfer the app1.sof via UART, store it to the flash and trigger the reconfiguration. Writing to the flash works.

However, something does not work. There are slight differences in the .rpd file written by the UART+Flash combination compared to direct flashing with the Quartus Prime programmer.

I am considering the endianess according to https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_rpd.htm

Is there something what I am missing?

In Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook the raw binary format (.rbf) is used.

Which format is the way to go?

[EBERLAZARE_I_Intel]

Hi,

We suggest you refer to our design example and give it a try first:

https://www.intel.com/content/www/us/en/design-example/714990/cyclone-10-lp-remote-system-upgrade-with-system-console.html

[EBERLAZARE_I_Intel]

Hi,

Do you have any additional questions?

[Joda]

Thank you. It works for now ith .rpd files. Are .rbf files also working for such purposes?

[EBERLAZARE_I_Intel · Accepted solution]

Hi,

The .rpd contains the FPGA configurations files to be program to the board. The configurations files can be in .rbf/.sof.

[EBERLAZARE_I_Intel]

Hi,

Any further help needed from your side?

[EBERLAZARE_I_Intel]

Hi,

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