FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

Routing rule of LVDS

Jiayi_H_Intel
Employee
400 Views

Hi experts

 

What's the routing rule of LVDS? For example, differential pair’s intra length matching, Clock-to-Data length matching, maximum trace length, etc.

Or any guide for reference?

0 Kudos
2 Replies
Rahul_S_Intel1
Employee
311 Views
0 Kudos
Rahul_S_Intel1
Employee
311 Views

Hi ,

Kindly let me know if you need further assistance

0 Kudos
Reply