Running PCIe to DDR3 Reference Design Demo in PCIe2.0

[Altera_Forum]

I'm running the PCI Express to DDR3 reference design demo (see page 8 of the attached document) in Windows XP on a motherboard with the Intel X38 chipset. I confirmed that this computer mother board/chipset is PCI Express 2.0 capable.  

 When I run the demo, the programs shows 8 lanes at Gen 1 running at 2.5 GB/s, but the Altera card (Stratix IV GX development board) is inserted in a PCI Express 2.0 slot on the motherboard so I thinking that the demo program should say Gen 2, 5.0 GB/s (but it doesn't)  Is there perhaps a switch setting on the Alter card or something to do with the MegaCore that determines the PCIe data rate?  Thanks,  Eric   -------------------------------------------------------  Electronics Engineer  Microwave and Communication Systems Branch   NASA Goddard Space Flight Center, Code 567  8800 Greenbelt Road, Greenbelt, Maryland 20771, USA  Building 25, Room S054, Mail Code 567.3  Phone: (301)-286-3439 Email: eric.j.harris@nasa.gov  -------------------------------------------------------

[Altera_Forum]

Hi Eric, 

 Did you get the PCIe gen2 to work in the reference design? I have the same development board and just ran into the same issue. Thanks.  Allan