FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

SRAM read/write

Altera_Forum
Honored Contributor II
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Hello, 

 

Could anybody post a sample small program to READ/WRITE into the SRAM. 

I have been running issues with the SRAM read/writes. 

I am working on the MAX II CPLD development board which has the CY1019CV33-15VC SRAM. My timing matches with that of the Reference example provided with the KIT, but i am not able to find the bug. So wanted to know if anybody has a small working program to read/write into the SRAM it would be greatly beneficial for me to test my design. 

 

Thanks for your time and patience, 

NEO
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Altera_Forum
Honored Contributor II
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Hello, 

 

I have found the solution to the problem. If anyone faces the same issue. I would suggest try checking the project settings. (right-click on the project -> settings-> device and pin options) and change the default setting for "Device and Pin options -> unused pins" from output driving ground to input tri-stated or input with bus-hold circuitry and everything will work just fine. 

 

:) Thanks to hank from altera support for pointing this out 

 

-neo
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