FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

SoCKit, U-Boot problem

Altera_Forum
Honored Contributor II
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Hi all, 

 

I just registered in order to post this new thread, because I have been looking for some information that could help me with this issue, but I'm not able to find anything useful. 

 

I have an Arrow SoCKit board. I used the Yocto Source Package to build the Linux distribution and run it on the board. But I also I'm trying to use image files generated by the Buildroot tool. The files used by the Altera tools to create the SD card image and write it to the SD card are: 

- Preloader binary 

- U-boot binary 

- Root filesystem 

- Device tree binary 

- Linux kernel image 

 

I changed the U-boot image generated by the YSP (Yocto Source Package) for the one generated by Buildroot. When I connect to the board by Putty, system is not able to boot (I attached a screen capture so that you can see what is displayed on the console). I thought the cause was that I used a different U-boot version, but I used then the same version that the YSP U-boot, and it keeps not working. 

 

I've been looking for some related information but as I said, I've found absolutely nothing... I would appreciate some help here. 

 

Thank you!
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Altera_Forum
Honored Contributor II
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I got this when the preloader wasn't able to find a valid u-boot. It turned out that I wasn't using the u-boot with the header applied.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I got this when the preloader wasn't able to find a valid u-boot. It turned out that I wasn't using the u-boot with the header applied. 

--- Quote End ---  

 

 

It seem to have a similar problem when I try to use a new version of u-boot. Which header files did you change? I assume you copied files from 'spl_bsp/generated' folder to 'board/altera/socfpga'. Is it correct?  

 

I would hope that default files would boot but I get this repeated over and over regardless which headers I use: 

 

U-Boot SPL 2013.01.01 (Jul 05 2014 - 19:15:46)  

BOARD : Altera SOCFPGA Cyclone V Board  

SDRAM: Initializing MMR registers  

SDRAM: Calibrating PHY  

SEQ.C: Preparing to start memory calibration  

SEQ.C: CALIBRATION PASSED  

ALTERA DWMMC: 0  

reading u-boot.img  

reading u-boot.img  

 

The older u-boot, which comes with Quartus 13.1 works. 

Regards, 

 

Roman
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