FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Speeding up the GHRD in an Arrow Development board?

Honored Contributor II



I am working with the GHRD in an Arrow Cyclone V devleopment board. 

All of the clocks in the FPGA fabric appear to run @ 50MHz by default. 

How do I adjust the frequency of the clocks in the FPGA fabric? 

Can I just adjust the clock out of the clock block from 50 to say 200 MHz? 

How can I verify the frequency actually used to synthesize the design and the clock running in the dev., board. 


What is the frequency of the clock inside the HPS to run the processor? 

How do I adjust that and how can I verify what is used? 


Thanks Martin
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