I'm using a custom board with a cyclone v fpga. The bare metal application, enables the watchdog. According the documentation should have a bit setted in rstmgr.stat field. I read them after a wd is happen, but the register are 0.
Do anyone have a successful configered watchdog and can explain a working solution.
To learn about the Bare Metal please check the following:
1- Document to learn
2- How to Video
3- Examples for CycloneVSoC