FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5915 Discussions

Stratix 10 SOC Development Kit example design qts_fmca_Q18.0.1_B261 not compiling

MohanY
New Contributor I
817 Views

 

I am trying to compile an example design for the Stratix 10 SOC Development Kit.

Under Development Kit Documentation , I downloaded and installed
L-Tile Production (18.0.1 or higher)

Tried the following example from the examples folder with Quartus Prime Pro Version 18.0.1 Build 261

example folder : qts_fmca_Q18.0.1_B261

Opened qts_fmca.qsf file

When compiled , it failed

I get the following are the errors that I get with Quartus Prime Pro 18.0.1 Build 261

Removing these names from the file list doesn't help. T=It gives a bunch of other errors.

Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_xcvr_user_tx_fifo_converter_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_freq_counter_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_xcvr_tx_rx_clkout2_converter_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_mm_bridge_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_data_pattern_generator_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_xcvr_user_rx_fifo_converter_0.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_rx_fifo.ip.
Error: Error opening C:/p/psg/board/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/ip/xcvr_test_system/xcvr_test_system_data_pattern_checker_0.ip.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/xcvr_test_system.qsys.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/cmos_test_system.qsys.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/fmc_xcvr_test_gx_2.qsys.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/fmc_cmos_system.qsys.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/fmc_xcvr_test_gx.qsys.
Error: Error opening C:/nfs/site/disks/psg_board_1/nwang/Stratix10_soc/reference_designs/RevA1_SX/Q18.0.1_B261_LTPRD/qts_fmca_Q18.0.1_B261/fmc_xcvr_test_gxt.qsys.
Error: Quartus Prime IP Generation Tool was unsuccessful. 15 errors, 0 warnings
Error: Peak virtual memory: 4717 megabytes
Error: Processing ended: Tue Jul 13 15:18:36 2021
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:35
Error(293001): Quartus Prime Full Compilation was unsuccessful. 17 errors, 0 warnings

0 Kudos
5 Replies
sstrell
Honored Contributor III
809 Views

It could be a permissions error on your project directory or the directory path may be too long.  Try bringing the project up some levels to have short file paths.

0 Kudos
AR_A_Intel
Employee
777 Views

Hello MohanY

 

Welcome to INTEL forum. Have you tried out the suggestion from SSTRELL? 


0 Kudos
MohanY
New Contributor I
771 Views

Yes, I tried that. I removed all the references to  "nwang" folders. It may be the person who created this design. After doing all that, I get the following error message now.

 

Error (20327): 2021.07.27.21:24:22 Error: Error writing xml report java.io.FileNotFoundException: C:\Intel_designs\qts_fmca_orig\ip\fmc_xcvr_test_gx\fmc_xcvr_test_xcvr_native_s10_htile\fmc_xcvr_test_xcvr_native_s10_htile.xml (The requested operation cannot be performed on a file with a user-mapped section open)
Error (20327): 2021.07.27.21:24:22 Error: qsys-generate failed with exit code 1: 1 Error, 0 Warnings
Error (14923): Error upgrading Platform Designer file "fmc_xcvr_system.qsys"
Error (11133): IP component QsysPrimePro with file "fmc_xcvr_system.qsys" upgrade failed
Error (23031): Evaluation of Tcl script c:/intelfpga_pro/21.1/quartus/common/tcl/internal/ip_regen/ip_regen.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 5 errors, 67 warnings
Error: Peak virtual memory: 297 megabytes
Error: Processing ended: Tue Jul 27 21:32:23 2021
Error: Elapsed time: 00:16:33
Error: System process ID: 21344

0 Kudos
AR_A_Intel
Employee
725 Views

Hi

 

Thanks for update and apologies for the delay as I was out of office recently. As per my understanding, dev kit reference design is meant to be used with the specific Quartus version only, we don’t support reference design upgrade using Quartus version. The recommendation is to stick with the same Quartus version.

Also, the dev kit reference design is meant mainly for BTS (board test system) testing only and if you are interested to learn about some specific IP, then you can refer back to the IP solution example design. Thanks   


0 Kudos
AR_A_Intel
Employee
699 Views

We have not heard from you and I hope all is well. I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


0 Kudos
Reply