Our project plans to use the Stratix® 10 transceiver (for non PCIe based appliacation). The requirement is that the application must enable a Spread Spectrum clocking with an down spread of 0.4% - 0.5% and a modulation frequency of 30KHz-33kHz. We want to know if the Stratix® 10 transceiver can support on SSC? FYI, I referred to XCVR user guide and didn't find any information of relevance.
The Stratix10 PLLs do support SSC, you can refer to the following table/link for more information:
I have gone through this, but this is not related to Transceivers. This SSC corresponds to IOPLL and fractional PLL found in FPGA fabric. But, for Transceivers, ATX PLL should support SSC (Spread-Spectrum-Clocking) but that information is not available either in Transceiver user guide or in ATX PLL IP settings. As per transceiver user guide, only hard PCIe IP supports SSC. So, I want to know any work around or patch is available to support SSC for Transceivers.