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Stratix S10 design examples: PHY

Nidhi_Gupta
Novice
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Stratix10 Transceiver PHY Basic Design Examples:

https://community.intel.com/t5/FPGA-Wiki/Stratix10-Transceiver-PHY-Basic-Design-Examples/ta-p/735775

 

I have Quartus Prime Pro 19.3.0 Build 222. Compilation of this design in Modelsim gets struck on vlog command while running ld. I have pasted the command below, where Modeisim is getting struck:

( vlog -reportprogress 300 -sv C:/intelfpga_pro/19.3/quartus/eda/sim_lib/mentor/ct1_hssi_atoms_ncrypt.sv -work fourteennm_ct1_ver )

I have following questions: 

  • What modifications are required to make simulation run using integrated Modelsim and Quartus Version 19.3?
  • Also, what is the path to pre-compiled simulation libraries used to simulate this design? I have installed quartus in default location.

 

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Kshitij_Intel
Employee
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Hi,


Can you please try with the Quartus version mentioned for the example design i.e. 18.0/18.1 depending on which design you are using.


Also please share which design you are trying to simulate from this shared link


Thank you

Kshitij Goel


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Kshitij_Intel
Employee
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Hi,


As we do not receive any response from you on the previous reply that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thank you

Kshitij Goel


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