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MLewi7
Novice
593 Views

Stratix V GX 100G Dev Kit JTAG Not Working

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On the Stratix V GX 100G dev kit, when I try to keep the Max II in the chain (J62 unconnected) I get a JTAG error when autodetecting, and the JTAG debug tool says "UNKNOWN_DEVICE" where the Max II should be showing up. All jumpers and switches are in the default settings.

How do I fix the JTAG so I can get back to factory settings? As far as I know this has never worked on this board.

All of this is because I wish to program the flash , however all the instructions to do so involve the Max II. Is there a way to directly program the flash from the FPGA and not rely on the Max II?

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MLewi7
Novice
55 Views

Since none of the above helped, thought I would post the work around I used in case anyone else runs into this. Solution was to set JTAG clock to 6MHz, for some reason it was not detecting correctly at the default USB Blaster II speed of 24MHz. Still not clear why the onboard JTAG doesn't work.

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5 Replies
YuanLi_S_Intel
Employee
55 Views
Hi Mark, May i know what JTAG error message u see? Can you show me the error message? I am assuming you use USB cable to program the development kit. Can you use USB Blaster II? Also, to program the flash with configuration data, you need to use .jic programming file. Regards, YL
MLewi7
Novice
55 Views

When I run the JTAG Debugger, I get:

"Warning: Uncertain JTAG chain. Detected 2 device(s).

Info: Device 1: 5SGXEA7H(1|2|2ES|3|3ES)/ ..

Info: Device 2: UNKNOWN_21A40DD"

 

I am using USB Blaster II already. The onboard JTAG doesn't work and is not detected by Quartus at all.

 

What the are .jic settings I need for programming the flash on this dev kit? I have looked but not found that anywhere yet.

YuanLi_S_Intel
Employee
55 Views
Hi Mark, Can you please check if the JTAG driver is properly installed in your PC? Regards, YL
MLewi7
Novice
55 Views

Yes it is installed correctly, I have programmed multiple FPGA's before with the same setup and the Dev Kit works to program the Stratix FPGA directly if I use a jumper on J62 and remove the Max II from the JTAG chain. I get the exact same error for this board on multiple setups.

Since programming FPGA directly works fine, using .jic file is the best option, but what are the settings for creating the .jic for this dev kit? I cannot find any mention of it in the user guide or dev kit reference documentation.

MLewi7
Novice
56 Views

Since none of the above helped, thought I would post the work around I used in case anyone else runs into this. Solution was to set JTAG clock to 6MHz, for some reason it was not detecting correctly at the default USB Blaster II speed of 24MHz. Still not clear why the onboard JTAG doesn't work.

View solution in original post

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