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AJung123
New Contributor I
324 Views

Struggling with the (mSG)DMA Controller Core

Still relatively new to FPGA development and I am currently working with the Intel Stratix SX 10. I was wondering if anyone knows how to connect the DMA Controller Core in the GSRD version 19.1 found here: https://rocketboards.org/foswiki/Documentation/ReleaseNotesAndContentsLTS

 

I guess what I'm asking is if there is an example that shows how the (mSG)DMA Controller Core is connected in the Platform Designer.

 

Thanks in advance!

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4 Replies
AJung123
New Contributor I
91 Views

Hi,

Sorry, I should have been more clear. I want to connect the DMA similarly to this configuration (which is for the Cyclone V): http://blog.reds.ch/?p=835 and add this configuration onto the GSRD I linked. I want to have the FPGA's DMA is connected to the hard processor of the Stratix 10 and then confirm the connection is correct by writing and reading data. The issue I am running into is that the (mSG)DMA require Avalon ports while the hard processor only has AXI4 ports. That is why I am having confusion with how the DMA interacts with the hard processor.

AJung123
New Contributor I
91 Views

Ahmed_H_Intel1
Employee
91 Views

Hi,

You have to use the bridges between FPGA and HPS. The following document shows you the features of these bridges:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_54005.pdf#p...

The following links shows a very useful examples for using these three bridges:

https://rocketboards.org/foswiki/Projects/HPS2FPGA

https://rocketboards.org/foswiki/Projects/LEDBlinkerUseOfTheFPGABridge

 

The following video is useful to understand the properties of these bridges.

https://www.youtube.com/watch?v=RTmDgNXIwKQ

 

Please let me know if you need more support.

Regards,

 

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