FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Synthesis time of different FPGA types


My company is going to build a new system and needs several thousand FPGAs for it. In order to optimize the development time, we want to optimize the synthesis time required for the FPGA. I have a couple of questions about this.

How does the synthesis time depend on the FPGA (from the start of the synthesis to the programming of the FPGA)?

1. Does this time depend on the FPGA size (number of PL System Logic Cells)? If so, how do the synthesis times differ between the sizes?

2. Does the time depend on the FPGA type? If so, how do the synthesis times differ between the types?

3. How can the synthesis time be reduced? (e.g. which PC hardware has an influence on the synthesis time?) 

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To answer your questions:

  1. No, synthesis time is design dependent. If you have a large design using a large amount of resources then it will take a long time to synthesize your design.
  2. No, again synthesis time is design dependent. However, different FPGA offer different performance levels: intel.com/content/dam/www/programmable/us/en/pdfs/literature/sg/product-catalog.pdf
  3. So far we don't see any synthesis problems that depend on PC hardware or OS. Just make sure your system and software meet the right requirements: https://fpgasoftware.intel.com/requirements/21.3/

To add to that, sometimes we have problems that causes long synthesis/compilation time and these are mostly caused by the Quartus software, not the FPGA itself. You may refer to our KDB to see if it's a known error: https://www.intel.com/content/www/us/en/support/programmable/kdb-filter.html#q=long%20compilation%20...

You may also refer to this document on how to speed up synthesis/compilation time: https://www.intel.la/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-compiler.pdf





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