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Altera_Forum
Honored Contributor I
842 Views

System Console connection problem with DE0-NANO-SOC kit

Hi, 

I am beginner with FPGA. 

I started with DE0-NANO-SOC kit and GHRD example supplied (DE0_NANO_SOC_GHRD) with the kit using Quartus 17.0 Lite edition. 

I am trying with System console to get hand on debugging. The device got found. 

But with system console, there is no connection listed under "device > (link) > JTAG". 

And upon executing tcl command: "get_Service_path master", it returns nothing. 

I tried to reinstall JTAG driver but no light. 

So if anybody can guide me here, what is wrong with system console connection? 

 

Thanks.
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Altera_Forum
Honored Contributor I
51 Views

https://alteraforum.com/forum/attachment.php?attachmentid=15792&stc=1 I got it in working state. 

It was my mistake. I was trying to run without loading the relevant .sof into the fpga. 

 

Now I am facing problem with nios2-terminal. 

it recognizes the connection as shown in attached image but then it does not respond at all. 

Any clue ?
Altera_Forum
Honored Contributor I
51 Views

The last query about NIOS2 terminal is also resolved. 

It was due to modified tcl script "ghrd_sc_script.tcl" which I run in the console. 

Using native command (without using the tcl script) in system console, I can see the characters in the nios2 terminal screen sent by system console using JTAGUART. 

 

As data can be sent by writing that data to the JTAGUART base address in system console's tcl script, 

is it possible to send data over JTAG UART using verilog or vhdl (without system console) ? 

In other words, how can JTAG UART base address be accessed in HDL approach ? 

 

Thanks.
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