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Altera_Forum
Honored Contributor I
741 Views

THDB_ADA_Utility inside code

Dear everyone, 

 

I am starting using Cyclone III FPGA board with the combination of ADA-GPIO daughter board. 

 

I am testing the board and found the ADA_Utility file, the exe file works good and can change the different frequencies very easily. 

 

I have built the sine signals with different frequencies already, but it seems not very efficient compared to the ADA_Utility exe file. 

 

So i am trying to figure out the inside information of the file, how it works. 

 

But I have not searched a lot about this. 

 

So is there anybody especially the altera stuff can help me or send me the files like you offered in demonstration files. I cannot see a lot just according to sof. files.  

 

Thank you very much. 

 

I am looking forward to hear from you. 

 

Best wishes, 

 

peipei
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4 Replies
Altera_Forum
Honored Contributor I
30 Views

Did you ever find out more about the ADDA board? I am currently using one with the Cyclone V. I am either trying to figure out the Verilog component or convert it to VHDL, which is the one I'm more familiar with.  

More specifically I am trying to read the data and take a FFT of it using the megawizard in Quartus. If you found out more about it and can share some knowledge that would be awesome. I just started looking into it myself as well.
Altera_Forum
Honored Contributor I
30 Views

Hello, I am still using this board and I need to change the components on board. I have removed the transformers which functioned as high-pass filter and used op-amp instead. I am still struggling with my project. Happy to talk with u if u have more progress.

Altera_Forum
Honored Contributor I
30 Views

Yes if I figure anything out I will certainly let you know. I will be working on trying to communicate with the ADDA board in my own VHDL file and hope for similar results as the demo program they provided. I am working on this from home and don't have anything to connect to it immediately but am hoping to capture the same noise that the demo captures with nothing connected. I'm having issues with the DE1_SoC demo that they added on for us to try, and their tech support has stopped getting back to me. In the mean time I will be using the normal DE1 (Cyclone II) board. I am a student working on this when I have time so I apologize ahead of time if I can't keep in touch on a continuous basis. If you find anything out then let me know!

Altera_Forum
Honored Contributor I
30 Views

Sorry for not betting back to you for a while! Just a quick update on what I'm up to. I have converted over to programming in Verilog. Since I am already pretty comfortable with VHDL, I am finding that using Verilog isn't that much of a leap from that knowledge. As of now for my project I am reading from the ADDA card, storing it to memory with the address incremented, and able to read it back from memory. I want to finish up the memory state machine and make use of the external clock signal to only write the data when a signal goes high. Once data is being collected as desired my next step is to plug it into an FFT. I was still having trouble programming to the DE1_SoC so for now I have been using a DE1 that I have access to. So my next plan is to use one of the built in FFT plug ins for the DE1. Once the system is working on the DE1, I want to figure out how to use the DE1_SoC to make use of the faster SoC properties. I hope your project is coming along well! I still kind of new to all this and hope you are progressing the same, if not faster, than myself.

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