FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

TSE_MAC to pc

Altera_Forum
Honored Contributor II
1,020 Views

hi: 

if I want to realize translation from the data in memory on chip to PC through RJ45,The steps I do as follows: 

1: sopc system: on chip memory->SGDMA_TX->TSE_MAC to PHY then to RJ45. 

2: in niosII elipse,software process is : 

open and reset :SGDMA_TX/RX , 

reset :MAC_TSE 

set : MAC_TSE registers and MAC address 

set :PHY speed and duplex mode 

enable :MAC_TSE and SGDMA_TX 

 

 

when the software code runs to the part of "set MAC_TSE registers".the process stop running,I donnot know why cannot set MAC_TSE register??
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
210 Views

you could debug your code to see if you are stuck in a loop or if it is the hardware that is stalling the CPU. If it is the latter, check that the TSE is receiving all its clocks (including the ones on the PHY side).

0 Kudos
Altera_Forum
Honored Contributor II
210 Views

thanks, 

the problem is still there ,I suspect that the reason is the corresponding registers of PHY chip(DP8384c) has not been set. 

because I write code using API which provided by TSE_MAC ,so I refer the  

altera_avalon_tse.h, altera_avalon_tse.c,the codes in these files are not simple,so ,I donnot know how to utilize them.and donnot know which registers of PHY should be set. 

 

I can send you the code I write ,and discuss with each other!~
0 Kudos
Reply