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My quartus project, using Quartus II 11.0 sp1 web edition and Qsys with a DE2-70 board, was made using a working generic project as starting point, made from two terasic example projects, one for controling an LCD and another to control a camera.
However if anything is inserted in the verilog files, the hardware changes are compiled and downloaded to the board with success, but the software download gives the error below: [Target Connection]: Connected system ID hash not found on target at expected base address Sorry for any english mistakes, its not my natural language.Link Copied
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Hi Xkolare,
I just worked through the same problem. In my case it was that my processor was being held in reset. Can you use SignalTap to check that reset_n is driven high? What changes are you making in the Verilog files? Also, you English is quite good :) Regards, Scott- Mark as New
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In the verilog files, the changes that I made are implementations of image filters.
I don't know how to use SignalTap, is it part of the development tools?
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