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Hi,
I'm working with the DVI daughter card of terasic. I want to make a loopback project with the resolution 1080P60 Hz, but its EDID doesn't allow that. Does any one worked with this kit before ? how to do for modifiying the EDID to support the 1080P 60 Hz. thank you. RabiaLink Copied
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I found it !!! I have implemented a new EDID file and it supports all resolutions... :)
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Hi,
I have a Terasic HSMC-DVI daughtercard which I have connected to a DE4 board. I reprogrammed the EEPROM with the EDID of a 1920x1080p/60Hz monitor and tried running the DVI loopback demo provided by Terasic, but I get a poor quality picture with bright green and red dots along edges in the image. The monitor connected to the transmit port also detects a 1921x1080 image instead of 1920x1080. Were you able to get the loopback demo running properly without video artifacts at 1080p60? The loopback demo works fine for me at 1280x720p/60Hz. I suspect the 1080p60 case has timing problems on the DVI RX PHY interface at 148.5 MHz, but without knowing board delays and skews, I don't know how to properly constrain the DVI RX interface on the FPGA side. Thanks for any help.
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