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To immediate action and validate root cause of Altera Corporation's Component Failure. We had submitted case service requested via Intel Premier Support (IPS) Web Portal under Case 00423526 as below.
Please expedite review and provide service request number# and shipping instruction to drop return affect Stratix® III Devices Failure back to Intel/Altera Corporation perform the analysis.
Appreciate for your support.
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Hello Wani,
Herewith below more additional the details per yours inquires.
Shall you expedite review and provide support with ERMA# and Shipping Instruction to drop return affect Stratix® III Devices Failure back to Intel/Altera Corporation perform the analysis ?
We got e-mail from your private message for return process BUT no attached file for shipping guidelines.
Appreciate for your support.
1. Please provide full device details.
1.1. Device name: Stratix III
1.2. Full part number: EP3SL70F780C4NAB
[CTH] Herewith below full device marking information.
SN: 11S00E7972YL11UE91M152
Marking: ALTERA
EP3SL70F780C4NAB
J CAFA71901A
KOREA
S848AFAZ
361JA8X0C
SN: 11S00E7972YL11UE91M121
Marking: ALTERA
EP3SL70F780C4NAB
J CAFA71901A
KOREA
S848AFAZ
361JA8X0C
SN: 11S00E7972YL11UE91M147
Marking: ALTERA
EP3SL70F780C4NAB
J CAFA71901A
KOREA
S848AFAZ
361JA8X0C
2. What is the failure rate? What is the failure rate vs. tested sample? Example: 2 out of 100 units.
[CTH] 13889 DPPM [Failed 3 out of 216 units]
3. What is the failure symptom? Please elaborate the failure symptom in detail.
[CTH] The failure symptom is FPGA Power +3.3VE Load to GND.
4. When did the failure happen? How did you discover the failure?
[CTH] Found Stratix® III Devices Failure [MFG PN: EP3SL70F780C4NAB] Failure during ICT [In-Circuit Test].
To confirmed failure through test step debug and can be duplicated failure with FPGA Power +3.3VE Load to GND.
Once replaced known good FPGA and re-tested to confirm the failure then its passed.
5. How did you determine the failure? Please elaborate the procedures.
Step1: Visual inspection board
Result : no any defect found
Step2: Verify by digital multimeter at +3.3VE To GND.
Result : Failed. Measure= 5 ohms, normally =~592 ohms. This compare with the good board.
Step3: Send Board to rework remove BGA Location UFPGA2 for confirm between pad pcb or UFPGA2
Result: Load in component (replace new part UFPGA2)
Step4: Confirm the board and component by send to re-test ICT [In-Circuit Test].
Result: Pass
6. Does the failure unit ever working before failure?
[CTH] Yes
7. Did they violate solder re-flow temperature profiles, moisture sensitivity? Please provide the re-flow temperature profiles.
[CTH] No any deviate solder re-flow temperature profiles and moisture sensitivity. The re-flow temperature profiles need to get approve from customer. Will keep you post update.
8. Did you swap the failure device to a known good board? Is the failure following the device or board?
[CTH] No. BUT Once replaced known good FPGA Units and re-tested to confirm the failure then board can have passed.
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Hello Zawani and Intel FPGA Support Team,
The process is lagging turn around time and need to resolving in ASAP.
I had update more additional the details per yours inquires via the Intel Community at https://forums.intel.com since last week
BUT still no attached file for shipping guidelines.
Understand from latest communucation below, Intel had approved to perform analysis with these FPGA devices.
Shall someone expedite provide support with ERMA# and Shipping Instruction to drop return affect Stratix® III Devices Failure back to Intel/Altera Corporation perform the analysis ?
Appreciate for your support.
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Hi Chaiyuth,
I believe you have received the shipping pac for your return guidelines on last Thursday. Please check your private message or if you can't find the attachment, I will re-attach the file for you.
Thanks!
-Wani-
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Hello Wani,
Much appreciate for your keep follow-up to provided Shipping Instruction to drop return affect Stratix® III Devices Failure back to Intel/Altera Corporation perform the analysis.
Per latest communication via the Intel Community at https://forums.intel.com,
I had received the attached file for shipping guidelines. [ERMA_Customer_Pac_FedEx.zip]
One more thing, Shall you provide a Return Authorization Number of the form (IPS# xxxxxxxx or Forum#). ?
Then we can write this number on the outside of the package for your reference prior ship back to Intel Microelectronics (M) Sdn Bhd - Malaysia.
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Hello Wani,
Some progress update, We are expediting shipment process to drop return affect Stratix® III Devices Failure return back to Intel Microelectronics (M) Sdn Bhd - Malaysia perform failure analysis --> Forum#04117084 for Return Authorization Number.
The shipment tracking will provide back to you in shortly. Please stay tune...
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Hello Wani and Intel FPGA Support Team
What is happen from Intel FPGA Team with the delay in turn around time with failure analysis perform ?
No any respond since Apr/24 until now while latest progress of the Analysis Update Report from Intel ?
We are in the pressure and need do your best in responding to this issue and for IBM business product.
Can you keep providing the Final Engineering Evaluation Report [EER] under ERMA#27253 by TODAY [May'02nd 2019 - US Time]
Appreciate for your help to pay attention.
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Hello Wani,
Thank you for your always support.
Per internally discussed with Celestica Product Engineering Team base on analysis result. Please be archive these units at Intel Analysis Site during this time frame until further notice.
In case have any more additional recommend need to indicate specifically perform by Intel FPGA Support Team. Will back revert back to you in shortly.
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Hello Chaiyuth,
We will archive the units as requested until further notice. You can contact us anytime for any technical issue you have.
Thanks!
-Wani-
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