Trouble with External Memory Interface Toolkit during 'Initialize Connections'

MDiet4 · ‎10-04-2019

Since a few days I've problem in 'Initialize Connections' with following Messages:

ERROR: The connection to the hardware drivers could not be established.

Before this Messages everything has worked properly, so it can said that the Project with its Platform-Designer and the generated .sof-File can be excluded for the root-case of my problem.

Unluckely the Error-Message didn't helped me. A restart of my Computer inclusive the whole HW-DUT didn't helped too. With another Computer from my workmate the Connection-Initialization works.

Before I've had this problem, I've installed a few stuffs for Python (incl. Perl64). Maybe there could be the problem, but how to solve?

Did someone of you had the same problem as I right now?

Thanks for any Helps!

NurAida_A_Intel · ‎10-07-2019

Dear MDiet4,

Thank you for joining this Intel Community.

I apologize for the delay in response as the case just re-route to me today.

I would like to clarify on few thing below:

Which Quartus version are you using? Is it same Quartus version used on another Computer from your workmate ?
What memory protocol (DDR3 or etc) used and what device ?

Also, on the connected host computer, please do the following:

1) On command line (Nios II Command Shell is an easy way to do this, which can be launched from Qsys -> Tools menu), type "jtagconfig -n" and paste what it returns.

2) Open System Console and load the design. Paste the messages in the lower left corner, and then what the following returns: "get_service_paths issp", "get_service_paths master", "get_service_paths sld".

Based on my past experience, this error could also be due to issue with the JTAG logic not meeting timing for the current speed. You may also want to try on debug step below and see if this make any changes on the test result.

First, specify the speed of TCK. Use jtagconfig -d

In order to rule out if this is an issue with the JTAG logic not meeting timing for the current speed, please reduce the TCK speed. For example, if you are currently at 24MHz, please try again at 16MHz.

Type the following command to change the TCK frequency:

jtagconfig --setparam <cable number> JtagClock 16M

Where:

<cable number> is the download cable to be modified.

Hopefully this is helpful. Let me know your feedback.

Thanks

Regards,

NAli1

MDiet4 · ‎10-07-2019

Dear NAli1 Thank you for your response. I’m using Quartus Prime 18.1.0 Build 625 09/12/2018 SJ Standard Edition and want to connect to IM8G08D3FCBG-125I (DDR3L). The FPGA we’re using is 10AS048H4F34E3SG As I mentioned first, the same Setup (Computer, USB Blaster II, Cables, DUT) has worked once. A Test with another Computer from my work-mate was successful (still the same USB Blaster II, Cables, DUT). $ jtagconfig -n 1) USB-BlasterII [USB-1] 02E040DD 10AS048E(1|2|3|3ES|4|4ES)/.. Node 00486E00 Source/Probe #0 Node 00486E01 Source/Probe #1 Node 00486E02 Source/Probe #2 Node 00486E03 Source/Probe #3 Node 00486E04 Source/Probe #4 Node 00486E05 Source/Probe #5 Node 0C206E00 JTAG PHY #0 Node 0C206E01 JTAG PHY #1 Node 00486E06 Source/Probe #6 Node 00486E07 Source/Probe #7 Node 00486E08 Source/Probe #8 Node 00486E09 Source/Probe #9 Node 00486E0A Source/Probe #10 Node 00486E0B Source/Probe #11 Node 00486E0C Source/Probe #12 Node 00486E0D Source/Probe #13 Node 00486E0E Source/Probe #14 Node 00486E0F Source/Probe #15 Node 00486E10 Source/Probe #16 Node 00486E11 Source/Probe #17 Node 00486E12 Source/Probe #18 Node 00486E13 Source/Probe #19 Node 00486E14 Source/Probe #20 Node 00486E15 Source/Probe #21 Node 00486E16 Source/Probe #22 Node 00486E17 Source/Probe #23 Node 00486E18 Source/Probe #24 Node 0C206E02 JTAG PHY #2 Design hash 0E466F9E52CA853CB7E4 4BA00477 SOCVHPS System Console: Okt 07, 2019 8:23:48 AM com.altera.debug.core INFO: Finished initialization Okt 07, 2019 8:23:48 AM com.altera.debug.core WARNING: Could not register IService packet Okt 07, 2019 8:23:48 AM com.altera.debug.core WARNING: A service named 'packet' is already registered. Okt 07, 2019 8:23:53 AM com.altera.debug.core INFO: Finished discovering JTAG connections Okt 07, 2019 8:23:53 AM com.altera.debug.core INFO: Auto linking 10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1 to ed_synth.sof Okt 07, 2019 8:23:54 AM com.altera.debug.core INFO: Finished discovering USB connections % get_service_paths issp /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_0/in_system_source_probe_0.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_1/in_system_source_probe_1.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_10/in_system_source_probe_8.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_11/in_system_source_probe_9.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_12/in_system_source_probe_10.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_13/in_system_source_probe_11.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_14/in_system_source_probe_12.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_15/in_system_source_probe_13.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_16/in_system_source_probe_14.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_17/in_system_source_probe_15.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_18/in_system_source_probe_16.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_19/in_system_source_probe_17.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_2/in_system_source_probe_2.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_20/in_system_source_probe_18.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_21/in_system_source_probe_19.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_22/in_system_source_probe_20.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_23/in_system_source_probe_21.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_24/in_system_source_probe_22.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_25/in_system_source_probe_23.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_26/in_system_source_probe_24.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_3/in_system_source_probe_3.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_4/in_system_source_probe_4.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_5/in_system_source_probe_5.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_8/in_system_source_probe_6.jtag /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_9/in_system_source_probe_7.jtag % get_service_paths master /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_27/phy_2/tg_cfg_component_tgmaster.master /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_6/phy_0/emif_hps_fpga_em_jtag_0.master /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_7/phy_1/emif_hps_fpga_col_if_colmaster.master<mailto:|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_7/phy_1/emif_hps_fpga_col_if_colmaster.master> % get_service_paths sld /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_0 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_1 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_10 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_11 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_12 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_13 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_14 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_15 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_16 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_17 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_18 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_19 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_2 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_20 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_21 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_22 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_23 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_24 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_25 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_26 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_27 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_3 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_4 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_5 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_6 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_7 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_8 /devices/10AS048E(1|2|3|3ES|4|4ES)|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_9<mailto:|..@1#USB-1/(link)/JTAG/alt_sld_fab_sldfabric.node_9> At the end I’ve changed the Clock to 16M and it works… :-) For my Knowledge: How is it possible that the timing isn’t met with the same set-up? Was my Computer getting faster so that USB-Blaster II comes in trouble? Thank you very much for your support! Regards, MDiet4

MDiet4 · ‎10-07-2019

Dear NAli1,

I've have to correct my answer... I've registered, that the clock-speed-reduction didn't have the successful impact. moreover one of the above mentioned instruction...? Actually I can connect with 24M, but only with Qsys and Systemconsole opened... But is this the solution at the end? For me it's still 'trial and error'...

Regards,

MDiet4

NurAida_A_Intel · ‎10-10-2019

Dear MDiet4,

I am sincerely sorry for the delay in response due to recent workload.

Glad to know that after reducing the TCK speed from 24M to 16M and its works. 😊

Regarding your question below:

How is it possible that the timing isn’t met with the same set-up? Was my Computer getting faster so that USB-Blaster II comes in trouble?

Ans: I believed its due to the hardware variable itself. Even with same setup, but still the PC used is different. The USB-Blaster/JTAG could be operating with different speed in different PC. So, what we recommend customer is always tune the TCK speed. If 16M doesn't work then try with 6M. Plus, we didn't faced any issue launching EMIF toolkit at our side with our setup.

Also, you mentioned that you can connect with 24M with Qsys and system console opened. I am sorry but this seems like doesn't make sense to me as I don't see any relationship between the EMIF toolkit performance with this 2 platforms mentioned (qsys and system console opened).

Hope this clear.

Thanks

Regards,

NAli1

NurAida_A_Intel · ‎10-10-2019

Also here is just some sharing regarding the cable that you can refer to: https://www.thailand.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_usb_blstr_ii_cable.pdf