UBoot 'load fpga' command

[K404]

Hi,

I am trying to configure an Agilex V via u-boot.

I have created a .core.rbf via HPS first compilation, and it is successfully moved to a location in RAM, however when attempting to load the FPGA, the following error is displayed:

```
AGILEX_V # fpga load 0 ${loadaddr} ${filesize}
..Error sending bitstream!
Command 'load' failed: Error -110
```

In uboot, the `.dts` l am using is as followed:
https://github.com/terasic/u-boot-socfpga/blob/atuma5_v2023.10/arch%2Farm%2Fdts%2Fsocfpga_agilex5_atuma5.dts

I read somewhere that I should be specifying in the .dts that:
```
&fpga_mgr {
status = "okay";
};

&base_fpga_region {
status = "ok
```

I am not sure what else to try! So I am making this post asking for some help finding a good next approach.

Could someone assist?

Many thanks

[K606]

Some more information from U-Boot:

SOCFPGA_AGILEX5 # fpga info
Altera Device
Descriptor @ 0x00000000ffddcac0
Family:         Intel SDM Mailbox
Interface type: Secure Device Manager (SDM) Mailbox
Device Size:    -1 bytes
Cookie:         0x0 (0)
No Device Function Table.

[K606 · Accepted solution]

This issue is solved via flashing the .jic before attempting to program via u-boot