USB on Cyclone 10 LP Evaluation Kit

[jmenn]

Is there a example on how to use the 8bit parallel USB interface on the cyclone10 LP . (usb* pins)

The interface is connected to the MAX10 device and the MAX 10 device is connected to CY7C68013A USB controller. Do I need a dedicated MAX10 program file and a USB driver.

I want to implement similar parallel fifo protocol as with FTDI232H. Any application note available?

Thanks Jan

[Deshi_Intel]

Hi,

Unfortunately USB IP is not official IP solution offered by Intel FPGA.

• Therefore, I won't be able to assist you much on the technical implementation of USB IP solution

From Intel FPGA perspective, we leverage 3rd party design house to provide USB IP solution. I managed to find 2 link as below

• https://www.intel.com/content/www/us/en/programmable/solutions/partners/partner-profile/system-level-solutions--inc-/ip/usb-2-0-device-with-fifo-interface--usb20hf-.html
• https://www.intel.com/content/www/us/en/programmable/solutions/partners/partner-profile/designgateway-co---ltd-/ip/usb3-0-device-ip-core.html
• Feel free to contact and engage with the design house if you are interested to purchase their USB IP solution

However, if you are just interested to implement your own USB IP solution, then hopefully some experience USB user in this forum community can jump in and advice you further.

Thanks.

Regards,

dlim

[jmenn]

Hello

I don't need IP for the FPGA. The cyclone10LP devkit has already a Cyprus CY7C68013A High-Speed USB Peripheral Controller.  This controller is connected to MAX10 device.

From the MAX10 device (symbol U3G) there is however a connection to the Cyclone 10LP

(see MAX 10 symbol U3G sheet 8 to   cyclone10 symbol U1G sheet 5).

So i expected this connection can be used by the user.  What is otherwise the usage of these connections  below?

usb_reset_n
c10_usb_clk
usb_wr_n
usb_rd_n
usb_oe_n
usb_full
usb_empty
usb_data
usb_addr
usb_scl
usb_sda

Regards Jan