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Hi,
I am using a Stratix IV PCIe HardIP and have a contiguous buffer DMA along with it. The BAR0 Address Map to a onchip memory location is 0x200000 to 0x200fff (64bit) BAR2 connects to the DMA Control register: 0x4000 to 0x403f. (32bit) The Read master and write master of the DMA are connected to the txs of the PCIe bus. I am trying using a simple 32bit transaction for a bunch of address from the DMA buffer to the memory but am unable to get it working. Setup: Besides the FPGA setup mentioned above. It uses a simple Windriver, See attached jpg for an example: https://www.alteraforum.com/forum/attachment.php?attachmentid=6485 but everytime I write to the BAR2 DMA offset 0x4001 with the start address and read back with e.g. 0x200000 as a 32bit (non block transfer) I am not able to add a source address it essentially reads back as zero. The same is applicable for the write register as well as the control register. I am using a s4gx_gen1x8_qsys reference model. So there are no changes essentially to my model. i) What is wrong with my method of access to the DMA? ii) Since I am transfering from my PC, what do I provide as a source address for in the source address register? iii) the PCIE:txs handles the write, so for the write address to the on chip memory do I use 0x200000 of BAR0 or should I connect it through another bus internally to the DMA with a separate address? Thanks
transfer.jpg
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