I'm looking forward for simple design flow to implement serial interface between FPGA and Host PC.
I'm aware I can connect HPS pins to FPGA to get uart_rx and uart_tx signals. Platform editor allows to work in two ways for this: (1) connect UART controller pins to FPGA (2) IO loaning.
In both cases its not clear how to connect the input and output signals added to the hps component instantiation, to the FPGA resources and be able to access them without incurring into synthesis error. Then:
(*) How to connect exported HPS pins to the top level module IO ports and internal signals?
(*) Regarding the preloader configuration, is it a must when using io loaning? Will GPIO selection in the Pin Multiplexer help to simplify the setup vs IO loan?
(*) Finally, accessing the UART through the AXI bridge may also work, can that setup function without starting up ARM processor, specifically, may the HPS work standalone?
Many thanks in advance.
Link Copied
AN706 talks you through configuring the HPS so that HPS pins are exposed to the FPGA fabric.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/soc/e...
Cheers,
Alex
Hi Alex, thanks for your reply.
Additionally,
Here is helpful information regarding connection:
Key it to use loan 49 and loan 50 on this board (instead of 60 and 61 which would be the direct understanding in Platform Designer gui)
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