- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I am using Cyclone V SoC Development Kit. and this board as PCI Express endpoint is connected to Host PC. But this board is not recognized by Host PC. I observed the "Itssmstate" signal by Signal tap II. It was repeated "link up and down". I am using Local clock on board as Refclk, Not using REFCLK from card edge. In this case, I think that "Slot clock configuration" check box in PCI hard IP of Qsys must be checked off . Becase The refclk in Host PC is differ from the refclk in add-in card. And, this board works as the Root port in default. then, For usging as the end point, It was written in the Users Guide. "To work as pcie end point, R249, R251, R253 and R254 must be removed, and R250 and R252 must be installed." But, I only removed R248 and R251. Can I use local clk as refclk of pci express?Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
This is resolved. clock generator(Si52112A1) in altera soc board does not has Spread spectrum Clocking(SSC) function. But, Host PC is using this SSC function. By turning off this SSC function in BIOS menu, Host PC recognized this SOC board. thanks
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page