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Hi,
I was reading quite a while in your foum and finally I managed to get registered here as I'm encountering problems with my NIOS II design. I know there may exist similar threads like this one, but I didn't truly get answers to my questions. I'm a student currently working on my bachelor thesis and my task is simplified to collect data from PIOs with a NIOS II (which does not really pose a problem ;) ) and sending them to a PC via Ethernet. I have got the following equipment:- DBC3C40 Development Board
- Quartus II 9.1 SP2
- NIOS II EDS 9.1 SP2
- Triple Speed Ethernet IP-Core
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hi andreq,
very funny, we`re in exactly the same situation. I have the same hardware ( DBC3C40 ) and i want to do the same: transmit data via ethernet to a pc. And i have the same questions . I have to say that im new to protocol stacks, physical and mac layer and those things. I thougt that a PHY is somehow a level converter like MAX232 and the MAC controlls communication errors like crc and collisions. Because there is a PHY ic (marvel 88xxxx) on the DBC3C40 i first wanted to know if i can simply transmit my data to the PHY with an selfmade vhdl modul. I didnt get a clear answer for that but i think that it is much work (especially for me) to implement such a part of a stack. Fortunately i found some example design for the DB3C40 board including a sample SOPC Desgin for a webserver and a software sample. This example uses the TSE with niche stack and microC/OS. Although i may have to get familar the the microC/OS i think this is the way i can do the job. But if anyone knows an easier solution without "highlevel stacks" and RTOS i would be grateful for input. @ andreq: i can give you the example designs if you need them
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