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NSV00
Beginner
138 Views

VREFB<#>N0 pin connectivity on MAX10

I am doing a design with MAX10 FPGA (10M25DAF484I). I am using both the internal ADC IPs and i have connected the ADC_VREF pin to a reference 2.5V power supply.

Right now i have not connected VREFB1N0, VREFB2N0, VREFB3N0, VREFB4N0, ...VREFB8N0. Can i leave all the VREFB<#>N0 pins unconnected? Or what should be the recommended connectivity?

The connection guidelines document says that: "If you are not using the VREF pins in banks or shared banks, connect unused pins as defined in the Intel Quartus Prime software" But i don't have any Quartus software installed to check.

I need to freeze on the hardware quickly. So please reply.

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2 Replies
EngWei_O_Intel
Employee
85 Views

Hi Nagendra SV You can refer to Pin Connection Guidelines: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/PCG-01018.pdf To set up the unused pins behaviour: In Quartus Prime tools, Go to Assignments -> Device -> Device and Pin Options -> Unused Pins tab and set the behaviour of unused pins. Thanks. Regards Eng Wei
EngWei_O_Intel
Employee
85 Views

Hi Nagendra SV

 

Do you have any question regarding the unused pins before we proceed to close the ticket?

 

Thanks.

Eng Wei

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