What options are available for debugging and configuring the Stratix 10 MX FPGA development board, and how to do it?

[HSuh0]

Hello, I'm new to Stratix 10 MX development board and I'm trying to set it up on the our server PC right now. Currently, it's installed on our PC through pcie x3 slot on the PC's motherboard. In this case, what options are available for debugging and configuring(download RTL design; *.sof to FPGA)?

Can we do it through PCIe connection? Or should we set up separate USB blaster cable from the host PC(which is server in our case) to the FPGA board? Then what is for the PCIe connection? Is it just for the communication between host CPU and FPGA?

Thank you in advance.

Best,

Han.

[Nathan_R_Intel]

Hie Han,

You can upload the configuration file (synthesized RTL that has been place and routed and assembled) either through PCIe or JTAG to the FPGA.

Hence yes, you can do it through the PCIe connection or using USB blaster cable that connects through JTAG.

Please refer to PG25 of the Stratix 10 MX development kit user guide on more information related to configuring the

FPGA.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-intel-s10-mx-devl-kit.pdf

Do let me know if you have additional questions.

Regards,

Nathan