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All,
I'm testing the Intel Low Latency MAC 10G IP core with the 10GBASE-R Register Mode PHY and it requires a ref clock of 322.265625 MHz into a PLL (Figure 30, UG-20016 | 2018.05.16, https://www.altera.com/documentation/nfa1438753448747.html) However, I couldn't find information as to which clock pin of the FPGA (10AS066N3F40E2SG) on the Arria 10 SoC Dev Kit (DK-SOC-10AS066S-A) has the needed frequency. The dev kit's schematic does not say anything about a clock of 322.265625 MHz. Could you please point me to the relevant docs that have the info? Thanks ArintelLink Copied
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Hi, I also meet the same problem , where to find a 322.265625 MHz clock on on INtel A10SOC Dev Kit board ? Thanks

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