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Dear Ma'am/ Sir,
I am using 10M50DAF484I7G. While configuring the IP "Tri speed EMAC", I am only able to select RGMII, GMII or MII interface. I am not seeing the SGMII interface.
Also I am not able to select the Transceiver type, its not enable.
And my doubt is like whether I will be able to use SGMII interface for Tri-speed EMAC with this MAX10.
PFA
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Hi,
The Intel MAX 10 can support the TSE IP. For further information, please do refer link below, Table 3, pg 8, https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/device-family-support.html
Besides that, the transceiver type only can be chose when the core variation has the 1000BASE-X/SGMII PCS.
If you want use SGMII, I would like to suggest you to enable the SGMII bridge which is under tab PCS/Transceiver option. SGMII only can run at 1000Mbps. If user want to run at 10/100/1000 mode, only 1000Mbps will be supported by using SGMII.
Best regards,
Zi Ying
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Hi,
Thanks for submitting the issue.
Please do allow me have some time to look into the issue and I will get back to you with findings.
Best regards,
Zi Ying
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Ok
Thank you.
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Hi,
The Intel MAX 10 can support the TSE IP. For further information, please do refer link below, Table 3, pg 8, https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/device-family-support.html
Besides that, the transceiver type only can be chose when the core variation has the 1000BASE-X/SGMII PCS.
If you want use SGMII, I would like to suggest you to enable the SGMII bridge which is under tab PCS/Transceiver option. SGMII only can run at 1000Mbps. If user want to run at 10/100/1000 mode, only 1000Mbps will be supported by using SGMII.
Best regards,
Zi Ying
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Hi,
Since I have addressed your question and no hear any feedback from you, I am now close the case.
If you have any question after the case closed, please do feel free to submit another issue.
Best regards,
Zi Ying
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Thanks for the solution...
I also have another doubt.
In our design we are using Arria 10 SoC, also we have max10 FPGA.
Can I boot the configuration file from the parallel flash which is connected to the MAX 10 FPGA to the Arria 10 SoC using the AVST booting.
While referring in the Arria 10 Boot User Guide, they are mentioning only Booting from MAX 2 and MAX 5. So, my question is like whether there are issues if we use MAX10.
In Stratix 10 SoC, they have mentioned the MAX10 FPGA for the same thing.

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