FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
6150 Discussions

Why separate VCCPD supply pins are not available for sub-banks of banks 3 and 8 in 5AGXMB1G4F40C5G?

SKacc
Novice
963 Views

We are planning to use bank 3D as 2.5V I/O signals and bank 3A,3B&3C as 3.3V I/O signals. But its corresponding VCCPD pins are not available in the pinout.

0 Kudos
4 Replies
Rahul_S_Intel1
Employee
834 Views

Hi ,

The above is expected. Kindly find the explanation.

The I/O banks with the same bank number form a group. For example, I/O banks 8A, 8B, 8C, and 8D form a group and share the same VCCPD

 

Reference page no: 142

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_5v2.pdf

 

Regards,

Rahul S

0 Kudos
SKacc
Novice
834 Views

Hi Rahul

 

What should be the supply voltage for the IO bank to which the LVPECL signals are connected?

 

Regards

Srikanth Kacchu

0 Kudos
SKacc
Novice
834 Views

Hi

 

Can anyone please answer above?

 

Regards

Srikanth Kacchu

 

 

 

 

0 Kudos
Rahul_S_Intel1
Employee
834 Views

Hi Srikanth,

In future , I am kindly requesting to raise another tread to ask further questions.

The LVPECL input depends on the input voltage VCCPD.

 

 

0 Kudos
Reply