FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5961 Discussions

Why the following error has occurred when I try to program FPGA? I use Altera board DE1_SoC. OS Ubuntu 18.04 and IntelFPGA 18.1 standard version.

GTese
New Contributor I
1,300 Views

aocl program: Running reprogram from /home/root/opencl_arm32_rte/board/c5soc/arn

altera_fpga_manager ff706000.fpgamgr: timeout

0 Kudos
1 Solution
AnilErinch_A_Intel
1,240 Views

Hi ,

If you can try the compilation on Ubuntu 16.04 or 18.04 that would be helpful , since the issues of compatibility of GLIBC can be avoided.

You can also check which version of GLIBC is currently installed in your system to cross verify.

Thanks and Regards

Anil

View solution in original post

0 Kudos
10 Replies
AnilErinch_A_Intel
1,240 Views

Hi

can you confirm that The MSEL settings for your board is correctly configured.

Thanks and Regards

Anil 

0 Kudos
GTese
New Contributor I
1,240 Views

I have conform the MSEL setting to pp32 bits.​

0 Kudos
AnilErinch_A_Intel
1,240 Views

Hi

Please set the MSEL to 01010

There is a similar issue observed in the following link

https://software.intel.com/en-us/forums/opencl/topic/850597

as mentioned there , can you refer to

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd06242013_922.html

and try to reduce the JTAG frequency and let us know the results.

Thanks and Regards

Anil

0 Kudos
GTese
New Contributor I
1,240 Views

Thanks

I use URTA USB for reprogram the DE1_SoC board via minicom. So, How I can reduce the frequency of URTA or it not?

I generated .aocx file by using offline compiler.

0 Kudos
AnilErinch_A_Intel
1,240 Views

Hi,

If you are using an SD card with pre-built image and using minicom to login to it please let us know the same.

In that case you can try creating the SD card image with lower JTAG frequency configuration.

Also please try multiple OpenCL examples , like helloworld and simple programs, and let us know whether the issue is still coming.

Thanks and Regards

Anil

0 Kudos
GTese
New Contributor I
1,239 Views

Thank you!!!

I have no idea creating SD card image with lower JTAG frequency configuration.

If you have some note on this idea please share with me.

 

0 Kudos
AnilErinch_A_Intel
1,240 Views

​Hi

You can check the following link on SD card image creation.

https://rocketboards.org/foswiki/Documentation/BuildingBootloader#Cyclone_V_SoC_and_Arria_V_SoC

Also if possible please use Ubuntu 16.04 and let us know , whether same issue exists.

The following guide will be helpful to get info about jtagconfig

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_usb_blstr.pdf

Thanks and Regards

Anil

 

 

 

0 Kudos
GTese
New Contributor I
1,240 Views

Thank you very much!! I have great respect you.

I have some issue.

After I program FPGA with .aocx file it now successful configured. However, when I try to running host code the following error is generated. So,how I can fix it?

/run: /lib/libm.so.6: version `GLIBC_2.27' not found (required by ./run)    

./run: /lib/libm.so.6: version `GLIBC_2.29' not found (required by ./run)    

./run: /lib/libc.so.6: version `GLIBC_2.17' not found (required by ./run)    

./run: /lib/libstdc++.so.6: version `CXXABI_1.3.8' not found (required by ./run)

./run: /lib/libstdc++.so.6: version `GLIBCXX_3.4.21' not found (required by ./run)

unfortunately, Upgrade OS Ubuntu 18.04 to Ubuntu 20.04.

Please help me!!!

Warm regrades!!

Guta

0 Kudos
AnilErinch_A_Intel
1,241 Views

Hi ,

If you can try the compilation on Ubuntu 16.04 or 18.04 that would be helpful , since the issues of compatibility of GLIBC can be avoided.

You can also check which version of GLIBC is currently installed in your system to cross verify.

Thanks and Regards

Anil

0 Kudos
GTese
New Contributor I
1,201 Views
0 Kudos
Reply