Writing from SDram to FPGA (FIFO) DE0-Nano-SoC

[BAbde5]

Hello,

I want to write from Sdram to FIFO in fpga . I tried to do that by using msgdma but some how it didnt work.

Device : De0-Nano-SoC

I have written data to a reserved memory in the sdram by using Physical address, because MSGDMA require a physical address to read from the sdram to FIFO

I connected the MSGDMA-Read to f2h Axi slave and the MSGDMA-Source connected to FIFO IN

Noting that i use this way because its require to have a 128 MB reserved in the memory.

I will really appreciate if some one has an experince in that could help

Thanks in advance.

[aikeu]

Hi BAbde5,

Sorry for late reply, do you still need help on this issue?

Thanks.

Regards,

Aik Eu

[aikeu]

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Regards,

Aik Eu