I have designed a hardware component in VHDL that generates 32-bit data at a rate of 1 MHz. The generated data has to be stored in the SDRAM so that I can read it from the HPS. The problem is that I don't know how to sent it. From what I have read (and think I understand), there are two ways to do this:
- Use an External Bus to Avalon Bridge to send the data to the L3 switch and then to the SDRAM.
- Use a SDRAM controller and send the data directly to the SDRAM.
Do you recommend any of these options or should I try another one. I have some experience in microcontrollers and FPGAs but not in SoCs so any advice would be appreciated.
I thought the FPGA could write directly into the SDRAM Controller as a master. Is there any reason why I should use the DMA? Also, I am beginning to doubt using the SDRAM is the best option for my project. I provide more details below.
I have designed an IP core that receives 4 consecutive bytes and concatenates them into a 32-bit word (basically a demux). I need to send the word somewhere so that the processor (running Linux) can pack the data and send it through Ethernet in UDP frames.
Yesterday, I read in other forum that one way to implement something similar is to use an On-Chip RAM with two slave ports (FPGA writes to RAM while HPS reads). Do you think that could work?