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Hi all,
I've been working on the Digital Camera Development Kit with a DE-2 Board and a Cyclone II FPGA, and I'd like to write data that comes out of the camera, to the SRAM or SDRAM. I saw that it could be possible by emulating a CPU called Nios-II in the FPGA. My question is simple : is it possible to have access to the memory without this tool and without the SOPC Builder stuff ? My worry is that I may have to work on a different FPGA later and I may have to re-use my VHDL code on another platform, and at first glance I thougt that it wouldn't be possible if I used the Nios-II processor. Thanks for helping ! Best regards, AntoineLink Copied
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of course you can.
you will need to write your own ip that does the data management between your source and the destination memory. the sram is pretta straight forward and for the sdram are some free sdram controller ips available. if you manage the dataflow by pure hardware this would be much faster then via software ( c code running on a cpu)- Mark as New
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First of all yes it is possible. But it is not easy. You have to manage the SRAM / SDRAM protocol and all the timing configuration by yourself. If you have a NIOS CPU there you can use a DMA who manage all the protocols and takes care of timings.
I think in Quartus there are some IP´s in Mega Wizard Environment you can use with SRAM or SDRAM. But then you have to find out how this works and you need some kind of control.- Mark as New
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What do you mean by "the sram is pretta straight forward" ?
So I don't need an IP controller for the SRAM, only for the SDRAM? BTW, what's an IP controller ? I'm sorry I'm a real beginner ^^- Mark as New
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OK thank you mki.
So, you both think that the Nios-II helps a lot. I have some algorithms of image processing to describe in VHDL, that is enough difficult for the moment si I will try with Nios-II in a first time. Thanks a lot for your answers.- Mark as New
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IP controller means, you have a modul that controls your access to the memory.
it handles all your read and write access. the ssram on the de2-70 can be like a simple ram memory setup adr & select signals or you can have burst access. sdram is indeed not that easy as mki already said. if you are going to use the sdram, you should use a ready to use sdram ip that you can focus on your application. if your are going to use the sopc, then you can use the sdram controller ip from altera and you could also implement your application as nios executable code or write your own modul that acts like a master to gain access to your memory and does your application in hardware. or you could mix software and hardware if you use the C2H funtionality. that means part of your application are executed by nios cpu and other parts are executed by hardware.- Mark as New
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--- Quote Start --- What do you mean by "the sram is pretta straight forward" ? So I don't need an IP controller for the SRAM, only for the SDRAM? BTW, what's an IP controller ? I'm sorry I'm a real beginner ^^ --- Quote End --- IP in this case means "Intellectual Property" and is some VHDL or Verilog code you can use or you have to pay for. It has nothing to do with Internet ;)
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Can you use the external memory without Nios/SOPC? yes, you could use the EMI IP from Altera.
Will this still work if I change FPGA to a different brand? No, the EMI interface is heavily dependent on IO architecture and this is not compatible between different FPGA manufacturers.- Mark as New
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uh hi...
i'm working on my final project and i need to store the data that i read from sdcard to sdram (as a buffer) and then display it to TRDB_LCM. i dont know how to write or read data to sdram. can anybody help me??? thanks- Mark as New
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--- Quote Start --- uh hi... i'm working on my final project and i need to store the data that i read from sdcard to sdram (as a buffer) and then display it to TRDB_LCM. i dont know how to write or read data to sdram. can anybody help me??? thanks --- Quote End --- YEs me too!!!!! I need to store info in the SDRAM or SD card if possible but I wonder if it is possible on DSP builder thanks!!
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@ismagine:
here is the function to write and read from sdram IOWR(SDRAM_BASE+address,my_data) IORD(SDRAM_BASE+address) you set 'address' value with the index or offset and 'my_data' is the value you want to store i found these in this forum too, but i forget in which thread hope it can help you- Mark as New
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--- Quote Start --- @ismagine: here is the function to write and read from sdram IOWR(SDRAM_BASE+address,my_data) IORD(SDRAM_BASE+address) you set 'address' value with the index or offset and 'my_data' is the value you want to store i found these in this forum too, but i forget in which thread hope it can help you --- Quote End --- thank you Mikio
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