Wrong entry on Jtag chain shown via BTS

[JSambrook_CSSI_FPGA]

Hello -

I think somehow manged to screw up an entry on the Jtag Chain shown when I run the Board Test System (BTS) on my Stratrix 10 development board.

My development board is the Stratix 10 GX FPGA development kit. It is the L-tile variant, DK-DEV-1SGX-L-A. I expect the FPGA part number to be 1SG280LU2F50E2VG. Yet the Board Test System main window shows something like: "1SG280HN(2S2|3S2)|.."

In other words, the FPGA part number seems wrong, and seems to be shown as a regular expression. In a sense, it's close, but I'm concerned about the "280HN" section, where I would have expected at least "280LU".

See the attached screenshot for what I am seeing from the Board Test System main dialog.

My questions are:

1. How can I reset or fix my Jtag chain if it's not correct?

2. Where is Jtag chain information stored in the Quartus software, programmer software, etc.?

Best Regards,

John Sambrook

Common Sense Systems, Inc.

[Fakhrul]

Hi JSambrook_CSSI_FPGA,

• What version of Quartus you're using?
• Did you select the default BTS design? Did you select and load the BTS example design from BTS software?
• May I know, have you change/program the default Stratix 10 pof design? For instance : Reprogram the Stratix 10 with your own design 
• Have you tried to use the auto detect feature in Quartus Programmer and check the detected device?

1. How can I reset or fix my Jtag chain if it's not correct?

2. Where is Jtag chain information stored in the Quartus software, programmer software, etc.?

• You may check it in  Tools ➤ JTAG Chain Debugger

Regards,

Fakhrul

[JSambrook_CSSI_FPGA]

Hello Fakhrul -

I did get past this problem. I found I could use "autodetect" to detect the JTAG chain. It would contain two devices.

The first device was the 5M2210. The second device was an FPGA with the wrong part number.

I just went ahead and added my bitstream anyhow, leaving now three devices in the chain. I deleted the bogus one

and was able to program the development board with my bitstream.

Thanks for your help, you can close this issue.

[Fakhrul]

Hi JSambrook_CSSI_FPGA,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.