FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Yocto build with time limited IP core in sof file

MohanY
New Contributor I
509 Views

Hello,

We bought a Stratix-10 Development kit - DKSOC1ssxLD with Part no. 1SX280LU2F50E1VG , L-tile. While doing a yocto build of a vendor supplied design , I am
getting the following error:

Error (210039): File fpga_hps_auto.sof contains one or more time-limited IPs that support the Intel FPGA IP Evaluation Mode feature that will not work after the hardware evaluation time expires. Refer to the Messages window for evaluation time details.

In the synthesis messages, I see the following:
Warning(18392): "SerialLite III Streaming" will use the Intel FPGA IP Evaluation Mode feature


The design in question uses Stratix-10 part number : 1SX280HN2F43I2LG , H-tile

Is there an extra charge to use "SerialLite III Streaming" IP core?
Or is this arising from the fact the license we got from the purchase of dev kit that has L-tile part?
If so, can we get a trial license for the H-tile part? Is there anyway to upgrade our license?

 

Thanks,

Mohan

0 Kudos
6 Replies
AR_A_Intel
Employee
491 Views

Hi

 

Welcome to Intel forum. Try this link https://licensing.intel.com/psg/s/ Then that should take you to evaluation/trial license site

https://licensing.intel.com/psg/s/sales-signup-evaluationlicenses

Alternatively, you could contact distributor for trial/evaluation license request. Please find the contact for our sales and distributor near you from link below:

https://www.intel.com/content/www/us/en/partner/where-to-buy/overview.html       


MohanY
New Contributor I
482 Views

Thank you for your reply. I used the trial license to synthesize and I still get the same warning and a time_limited sof file.

Warning (18391): Intel FPGA IP Evaluation Mode feature is turned on for the following cores
Warning (18392): "SerialLite III Streaming" will use the Intel FPGA IP Evaluation Mode feature


Warning (265072): Messages from megafunction that supports Intel FPGA IP Evaluation Mode feature
Warning (265073): Messages from megafunction that supports Intel FPGA IP Evaluation Mode feature Intel Seriallite III
Warning (265074): Intel Seriallite III will be deactivated when the evaluation time expires.
Warning (265074): Intel Seriallite III will be deactivated when the evaluation time expires.

 

I don't know, if this is a license issue with the development kit or if this IP block needs a separate license.

Appreciate any help.

AR_A_Intel
Employee
475 Views

Hi

 

For further checking could you provide

1) License.dat file

2) Error message screenshot

3) Screenshot of Quartus >> tools >> license setup

4) assembler report .asm.rpt file

•           The assembler report is located in <Project directory>/Output_files/<project_name>.asm.rpt.

 

And for privacy, you can reply/attach your file in private message.


MohanY
New Contributor I
456 Views

How do I send a private message ? I don't see an option. I searched Intel community and this is what I found.

 

Steven_L_Intel1
Steven_L_Intel1
Employee
‎05-05-2014 01:01 PM
143 Views
Sorry, they have taken away the ability for non-Intel users to send private messages. An Intel representative can send YOU a private message, to which you can reply, but you can no longer start the process. I was told that this ability was considered a violation of privacy rules, but I don't agree. I'm trying to convince them to bring it back as it's a valuable feature.

 

Please help.

 

AR_A_Intel
Employee
434 Views

Hi

We reply you a private message.


AR_A_Intel
Employee
309 Views

Continue support in private message mail. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


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