FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5892 Discussions

cyclon V, dedicated pins:

NAdel1
Novice
495 Views

in the Generic Serial Flash Interface IP Core there is an option "Enable SPI pins interface", but when i connect my top's pins to the dedicated pins (DCLK, DATA0-3, nCS) i get a pin error, how can i configure it?

0 Kudos
3 Replies
YuanLi_S_Intel
Employee
319 Views

Hi Adelman,

 

May i know what error you can? Can you please share us the error message?

 

Thank You

0 Kudos
NAdel1
Novice
319 Views

This is the error i get.

I put the right pin location in the assignment editor, with value I/O Standard 3.3-V LVCMOS.

thanX

 

Capture.PNG

0 Kudos
YuanLi_S_Intel
Employee
319 Views

Hi Naftali,

 

From the information, it seems like it is due to fitter error which the pin is not placed in appropriate pin. Can you try to assign the pin to the other pin? Or, you may remove the pin assignment and let quartus do the pin assignment.

 

You may also refer to the IP user guide for more information about the usage and flow of the IP:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf

 

Thank You.

0 Kudos
Reply