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Helo there
I have EP4CE6E22C8N Cyclone IV FPGA, Im programing with Quartus prime lite ver 20.0.1
In Quartus all work ok: program with basic OR gate, diagram, simulation (see image 1) & programing board.
But my FPGA dont do OR gate My board do AND gate.
To "fix" i set NOT gate in input1 & input2 and set NOT gate in Output (see image 2)
You know how to fix my board to avoid NOT gates???
Thanks
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LEDs and pushbuttons are usually active low, so when you push both buttons, you're putting 00 into the OR gate, getting a 0 out, which lights the LED.
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Your simulation for the OR gate is correct. Remember the truth table for an OR gate:
00 | 0
01 | 1
10 | 1
11 | 1
Maybe you're thinking of XOR:
00 | 0
01 | 1
10 | 1
11 | 0
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Hi, Thanks for your reply
And ofcourse simulation is ok, But FPGA DONT do OR gate, FPGA do AND gate.
See the pictures please.
You know how FPGA do OR gate if i programing Or gate??
Chers
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LEDs and pushbuttons are usually active low, so when you push both buttons, you're putting 00 into the OR gate, getting a 0 out, which lights the LED.
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