FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5240 Discussions

headache about CCD Video signal transmission

Altera_Forum
Honored Contributor II
777 Views

hi: 

I am very helpless for the job at hand,now. 

I gether a lot of references and hope to resolve the questions on my own,but I found that it is very difficult for me ,because of the lock of the projects experience,so I turn for your guru's help again:)forgive me asking stupid questions!~(and I am sorry that my English is not good) 

 

the aim of my job :make Video signals to be display on PC via ethernet(RJ45).(My development board is NEEK ) 

 

The steps I plan to do as follows: 

 

:)first: input Video signals to SDRAM,I have 2 questions: 

1:can I use PIO module used as signals input,because I donnot find the corresponding module intergrated into SOPC? 

2:I want to start my work from establishing the simplest project,that is, to store PIO data in SDRAM by DMA,{In fact, the PIO donnot need DMA,I use it here is in order to prepare for the Video signal , the Video signal is a large amount of data.} is this right? 

 

:) second:to realize the transmission between SDRAM and FIFO of TSE_MAC,I have one question: 

1:what's kind of the data format trasmitted from SDRAM to FIFO of TSE_MAC?according to the MAC frame format, the CCD Video signal data should be added source address or something? 

 

:) third:how to establish communication between the writed data of FIFO in TSE_MAC and the PC via ethernet? 

 

maybe my steps are so stupid,but I can only think of these.and I was determined to achieve my goal~~ 

 

hope somebody gives me hints ,so I donnot be caught into dead cycle...thanks 

 

 

Best regards
0 Kudos
0 Replies
Reply