how to increase the data width of an input

[rgodw]

i have to complete a signed n-bit adder. the inputs are STD_LOGIC_VECTOR((DATA_WIDTH-1)downto 0) and output is STD_LOGIC_VECTOR((DATA_WIDTH)downto 0) i was told to do it as by increasing the datawidth of the input in the architecture find the value of the MSB of the input and that would be the new input (data-width) im not sure if you understand what i mean but im happy to try to clarify if i can any suggestions are welcome

[Vicky1]

Hi,

'how to increase the data width of an input' - - - just increase the value of 'DATA_WIDTH' in generic statement of entity.

' i was told to do it as by increasing the datawidth of the input in the architecture find the value of the MSB of the input and that would be the new input (data-width) im not sure if you understand what i mean but im happy to try to clarify if i can any suggestions are welcome' - - - - - - it`s confusing statement. please check attached hdl code & change the 'n' from 2 to 4 etc.. in that case vector will be of size (3 downto 0).

Regards,

Vicky

[Vicky1]

Hi,

May I know any update or should I consider that case to be closed?

Regards,

Vicky