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how to write data to fpga side sdram on cyclonev

cyclonevmaster
Beginner
705 Views

it spends me many days and nights ,any help will be appreciated!

i want to write data to fpga side sdram from hps,and my qsys system is do so

cyclonevmaster_0-1687457823444.png

my code is 

 

//gcc 标准头文件
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#define soc_cv_av //定义使用 soc_cv_av 硬件平台
#include "hwlib.h"
#include "socal/socal.h"
#include "socal/hps.h"
//与用户具体 HPS 应用系统相关的硬件描述头文件
#include "hps_0.h"
#define HW_REGS_BASE (0xc0000000 )//HPS 外设地址段基地址
#define HW_REGS_SPAN (0x04000000 ) //HPS 外设地址段地址空间
#define HW_REGS_MASK (HW_REGS_SPAN - 1 ) //HPS 外设地址段地址掩码
 
#define L3_BASE_ADDRESS (0xFF800000)
#define L3_CONFIG_REG_OFFSET (0x0)
 
static volatile unsigned long *emif_virtual_base = NULL; //pl_ddr3 虚拟地址
static volatile uint32_t *l3_virtual_base;  //L3  32位寄存器虚拟地址
 
int fpga_init(long int *virtual_base,long int *l3_base) {
int fd;
void *periph_virtual_base; //外设空间虚拟地址
 
//打开 MPU
if ((fd = open("/dev/mem", ( O_RDWR | O_SYNC))) == -1) {
printf("ERROR: could not open \"/dev/mem\"...\n");
return (1);
}
//将外设地址段映射到用户空间
periph_virtual_base = mmap( NULL, HW_REGS_SPAN, ( PROT_READ | PROT_WRITE),
MAP_SHARED, fd, HW_REGS_BASE);
if (periph_virtual_base == MAP_FAILED) {
printf("ERROR: mmap() failed...\n");
close(fd);
return (1);
}
 
    // 映射 L3 寄存器地址到用户空间
    l3_virtual_base = (volatile uint32_t *)mmap(NULL, sizeof(uint32_t), PROT_READ | PROT_WRITE,
                                                MAP_SHARED, fd, L3_BASE_ADDRESS + L3_CONFIG_REG_OFFSET);
    if (l3_virtual_base == MAP_FAILED) {
        printf("ERROR: mmap()L3 failed...\n");
        close(fd);
        return 1;
    }
 
//映射得到 pl_ddr3 外设虚拟地址
emif_virtual_base = periph_virtual_base
+ ((unsigned long) (MEM_IF_DDR3_EMIF_0_BASE)
& (unsigned long) ( HW_REGS_MASK));
*virtual_base = periph_virtual_base; //将外设虚拟地址保存,用以释放时候使用
*l3_base = l3_virtual_base;
return fd;
}
 
int main(int argc, char ** argv) {
int fd;
long int virtual_base = 0; //虚拟基地址
long int l3_base = 0;
 
uint32_t l3_config_value;
 
 
//完成 fpga 侧外设虚拟地址映射
fd = fpga_init(&virtual_base, &l3_base) ;
printf("mem map successfully!\n");
int i;
int read_data;
 
// 设置低5位为1
l3_config_value = *l3_virtual_base;
l3_config_value |= 0x1F;
 
printf("1\n");
 
 
 
*(emif_virtual_base + 0) = 5;//<< i;
printf("write finished!\n");
 
usleep(100000);
 
 
read_data = *(emif_virtual_base + 0);
printf("read data = %d\n",read_data);
 
usleep(100000);
 
printf("game over\n");
 
 
//取消虚拟地址映射
if (munmap(virtual_base, HW_REGS_SPAN) != 0) {
printf("ERROR:periph munmap() failed...\n");
close(fd);
return (1);
}
 
if (munmap(l3_base, HW_REGS_SPAN) != 0) {
printf("ERROR:l3 munmap() failed...\n");
close(fd);
return (1);
}
 
 
close(fd); //关闭 MPU
return 0;
}
 
however,when i ran the code , the result is
cyclonevmaster_1-1687457922636.png

 

i have 3 questions

1:is to config the L3 register bit3 to 1 necessary? I find some document shows that i need to set the L3 register bit 3 to 1 to enable the h2f_axi_master

cyclonevmaster_0-1687458354887.png

 

 

2.wheather the mm_bridge_1 ip is necessary in my design? i saw someone connnet the ddr3 ip-avl to h2f_axi_master immediately?

 

3.what is the possible reason for the bus error?

 

thx a lot!

 

 

 
 
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4 Replies
Jeet14
Employee
665 Views

Hi,


I will be working on this case.

Please do allow some time to go through this case. I will reply ASAP.


Regards

Tiwari


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cyclonevmaster
Beginner
656 Views

Thanks for your reply!

I have find out the reason of  my “bus error”,it was because that I set the a wrong value of L3 register bit3.it should be 1 to enable the axi master,but i set it to 0 and the master was disabled.

However,i met another problem when i set correct L3 register.My code like this

cyclonevmaster_0-1687755214167.png

any time i ran the code,it showed "write finished" and then was stuck.

cyclonevmaster_1-1687755278599.png

 

i am a rookie on cyclonev and i have just learned this forweeks,i am sorry that my description may be unprofessional.if you can present me some easy examples of how to write data from hps to fpga ddr3 on cyclone v, it will help a lot. 

 

thanks again for your answering my foolish problems

 

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Jeet14
Employee
606 Views

Hi,


You can try below example on cyclone V. But this example is based on old version.

https://www.intel.in/content/www/in/en/support/programmable/support-resources/design-examples/horizontal/fpga-to-hps-bridges-design-example.html


Let me know if you have any query on this.


Regards

Tiwari


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Jeet14
Employee
593 Views

Hi,


I believe your enquiry has been answered. With that, I now transition this thread to community support. 

Thank you.


Best Regards,

Tiwari


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


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