- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello Friends,
I have generate preloader by following steps.
Quartus18.1->bsp-editor->Generate
(serial enable, boot from qspi enable, semi hosting enable, watchdog disable)
go to software/spl_bsp and do "Make" --> and "make uboot" and i got "u-boot-spl"
in spl_bsp/uboot_socfpga folder.
now using this "u-boot-spl"
i invoke armds ide through Quartus18.1 embedded shell
In the field Connection should be set the CV SoCKit 1-1 option
Set the file u-boot-spl on the Files tab, through workspace u-boot-spl. Set the flag «Load symbols». Remain the «Files» field empty.
Switch off a debugging script launching on the Debugging tab.
Run terminal utility and press the «Debug» button. The preloader is loaded into memory and a debugger is ready to launch.
it suppose to show something like
U-Boot SPL 2013.01.01 (Oct 13 2020 - 16:45:28)
BOARD : Altera SoCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 925 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 50000 KHz
CLOCK: QSPI clock 370000 KHz
RESET: COLD SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB ALTERA DWMMC: 0 Card did not respond to voltage select! spl: mmc init failed: err - -17 ### ERROR ### Please RESET the board ###
but instead it shows as highlighted red box in attached print-screen on preloader execution process.
Please help me out what went wrong , why not my preloader execute completely , why it stuck by just showing
"U-Boot SPL 2013.01.01 (Oct 13 2020 - 16:45:28)"
please see the attached for reference
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
here i am trying to re-write "preloader not execute completely" little crisp for batter understanding
----------------------------------------------------------------------------------------------
The source code of the no-OS software and the scripts can be downloaded from the Analog Devices github.
no-OS Software
https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/baremetal
AD9361 No-OS Software https://github.com/analogdevicesinc/no-OS/tree/master/ad9361/sw
Generic Platform Driver https://github.com/analogdevicesinc/no-OS/tree/master/ad9361/sw/platform_generic
I have Cyclone V-SoC-kit board from Arrow and I have been trying to Run "AD9361 No-OS Software"
Tool Used: Quartus18.1, ARMDS2020.0
So far, I have been following these below steps:
1. Download "Generic Platform Driver" from GitHub and using tcl scriptor generated HDL Project (source ./system_project.tcl)
2. using plateform designer generate hdl (using system_bd.qsys)
3. Successfully compiled on Quartus
4. Generated a preloader using bsp-editor.(Enable-Semihosting,SDRAM_SCRUBBING,SERIAL_SUPPORT,BOOT_FROM_QSPI,DISABLE WATCHDOG)
5. Generated preloader using make command
6. Generated u-boot.img using make uboot commad
7. Using SOCEDS Command shell open ARMDS 2020.0 (./armds_ide)
8. then Run->Debug COnfiguration by selecting following configuration
in Connection Tab:-
8.1 Plateform-->Cyclone V SoC(Dual Core)->Baremetal-> debug Cortex-A9_0
8.2 Target COnnection->USB Blasetr
8.3 Connection CV SoC kit
In File Tab:-
-> Select u-boot-spel from file system (where bsp-editor generate u-boot-spl file)
9.Apply->Debug
10. Open putty and connect to the board (115200, 8bit, 1 stop bit, handshaking:none)
The result on putty terminal is nothing. I received nothing on the Putty terminal.
Please Comment where i am doing wrong ...? or what step i missed during entire booting process ?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Can you try to boot using below tutorial on booting using QSPI?
https://rocketboards.org/foswiki/Documentation/GSRD131QspiBoot
Also, you may need to recheck you MSEL,BSEL and CSEL pin if they have been set correctly.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page