problem of ethernet interface test on Stratix II GX Audio-video Board test design

[Altera_Forum]

Hi, 

I use the document "Stratix II GX audio-video board test design guide rev 0.5" which is included in the development board's CD for interface test. I followed the intructions provided in 1.6 Ethernet Interface Test and get the following results: FAIL: Failed to detect known device <ID:0x0> FAIL: PCS loopback failed. I am wondering what can cause the failure of the PCS loopback test. Is it because there is something wrong with the dev board or the document should be updated?   thank you for your attention and any advice is appreciated.

[Altera_Forum]

I have two of the same board here in my office.  

 I've never run the provided test design so I can't help there.  My opinion is that it's easier to build a simple test design using the TSE MAC or Avalon OpenCores MAC with Altera's simple socket server example code.  Jake

[Altera_Forum]

Hi, 

 thanks for the reply! I have built the SOPC system and run the simple socket server program. I got the following information: ------------------------------------------------------------------------ [tse_mac_init] SGDMA desc memory cleared  INFO : TSE MAC 0 found at address 0x09025400 ERROR : MAC Group[0] - No PHY connected! ERROR : PHY[0.0] - No PHY connected! Gigabit = 0, Duplex = Full TSEMAC SW reset bit never cleared! OK, x=10002, CMD_CONFIG=0x00002000 ------------------------------------------------------------------------- what can be the reason for the error? Something wrong with the PHY? Any reply is appreciated! 

[Altera_Forum]

Okay, well you are apparently using version 8.0 of the MAC. They've updated the driver and I'm not as familiar with it. However, I do know that they changed the way they do PHY detection in 8.0. I believe the user has to do a little more than before. 

 The message you are getting comes from the MAC driver: C:\altera\80\ip\triple_speed_ethernet\lib\sopc_builder\altera_triple_speed_ethernet\HAL\src\altera_avalon_tse.c line number 1,271  The first thing I would check is your MDIO interface to the PHY. The MAC provides 4 signals that get exported outside of SOPC builder for the MDIO interface. mdc - MDIO clock mdio_out - MDIO output data mdio_oen - MDIO output enable mdio_in - MDIO input data  At your top level, you need to make sure these are correctly connected to your PHY. Typically you're going to have a single bidirectional signal to/from the PHY which is the mdio data input/output signal. If we assume this signal is called eth_mdio in your top level, then you would need some assignments like this:  module top_module( ... inout eth_mdio, ... wire eth_mdio_out; wire eth_mdio_oe; ... assign eth_mdio = eth_mdio_oe ? eth_mdio_out : 1'bz; // high-impedance when not driven my_sopc my_sopc_inst( ... .mdio_out_from_my_mac(eth_mdio_out), .mdio_oe_from_my_mac(eth_mdio_oe), .mdio_in_to_my_mac(eth_mdio), ...   Jake

[Altera_Forum]

Hi, 

 thanks a lot for the input! I followed altera's example for TSE_SGDMA to connect the mdio,mdc signals and the gmii_mii_mux.v file was used in the top level. I do not understand why i got " TSEMAC SW reset bit never cleared!". Has it something to do with the MAX II device on the audio video board (since the ENET_RESET signal is connected to the MAXII device)?