problem with bsp generation after qsys modification

[DTebo2]

Hello, 

i have a problem with bsp generation after qsys modification; 

During conpilation i have this error : 

SEVERE CPU "nios2_qsys_0" reset memory "avl_bridge_slave_full_mm" has no matching memory region

how can i match the memory region? there are no error after qsys generation...

job is on cyclone V, quartus prime 17.1

Thank you in advance for your answers....

[MEIYAN_L_Intel]

Hi,

I would like to know do you modified the BSP in Qsys system?

May I know what have you change and can you list down the flow?

Also, can you attached the full design here for further investigate?

Thanks

[DTebo2]

hi,

Thank you for your answer. We did not modify the BSP (the native BSP) only some interface of the qsys core.

Please see attachements

[MEIYAN_L_Intel]

Hi, 

In the Qsys system, I saw the Nios II processor with reset vector memory is assign as "avl_bridge_slave_full_mm". 

Based on the error message, can you try to connect the avl_bridge_slave_full_mm to an on-chip RAM?

Thanks