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Altera_Forum
Honored Contributor I
813 Views

read data from SSRAM (IS61LPS25636A)) on Cyclone III starter board

Anybody know how to read data from SSRAM (IS61LPS25636A)) on Cyclone III starter board? I followed the datasheet, but still could not read the data correctly. My code is as follows 

 

`timescale 1ns / 1ps 

module mem_read( 

ssram_clk, 

clk, 

reset_n, 

ssram_adsc_n, 

ssram_bw_n, 

ssram_bwe_n, 

ssram_ce_n, 

flash_ssram_a, 

flash_ssram_d, 

ssram_oe_n, 

test_led  

); 

input ssram_clk; 

input clk; 

input reset_n; 

output wire ssram_adsc_n; 

output wire [3:0] ssram_bw_n; 

output wire ssram_bwe_n; 

output wire ssram_ce_n; 

output wire [19:2] flash_ssram_a; 

input [31: 0] flash_ssram_d; 

output reg ssram_oe_n; 

output wire [3:0] test_led; 

assign ssram_adsc_n=1'b1; 

assign ssram_bw_n=4'b1111; 

assign ssram_bwe_n=1'b1; 

assign ssram_ce_n=1'b0; 

 

// assign flash_ssram_a=counter1; 

// assign ssram_oe_n=1'b0; 

 

reg [1:0] counter; 

always@(posedge ssram_clk, posedge reset_n) 

begin 

if (reset_n) 

counter <=2'b00; 

else if (counter1==18'b111111111111111111) 

counter <=2'b00; 

else if (counter==2'b11) 

counter <=2'b01; 

else 

counter <= counter + 2'b1; 

end 

 

//counter 

reg [17:0] counter1; 

always@(posedge clk, posedge reset_n) 

begin 

if (reset_n) 

begin 

counter1 <= 18'b111111111111111111; 

end 

else if (counter1==18'b111111111111111111) 

counter1<=18'b000000000000000000; 

else  

begin 

counter1<=counter1+18'b1; 

end 

end 

 

assign test_led[0]=reset_n; 

assign flash_ssram_a =counter1; 

 

always @(negedge ssram_clk, posedge reset_n) 

begin 

if (reset_n) 

begin 

ssram_oe_n <=1'b1; 

end 

else if (counter1==18'b111111111111111111) 

begin 

ssram_oe_n <=1'b1; 

end 

else if (counter==2'b01||counter==2'b11) 

begin 

ssram_oe_n <= 1'b1; 

end 

else if (counter==2'b10) 

begin 

ssram_oe_n <= 1'b0;  

end  

else 

end 

endmodule
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3 Replies
Altera_Forum
Honored Contributor I
62 Views

Please do not multipost, and "still could not read the data correctly" is quite vague...

Altera_Forum
Honored Contributor I
62 Views

I have a query and that is, whether it is possible to write the ssram from outside nios like in vhdl code but read from nios to process the data?

Altera_Forum
Honored Contributor I
62 Views

It is possible. You should create your own custom SOPC component with an avalon master interface. The SOPC system will then share the RAM access between your component and the Nios CPU.

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