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10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demo Ref Design

10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design

Application Note 

Please refer to AN638 - 10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design on Altera Suppport Webpage

 www/support/ip/interface-protocols/ips-inp-10gbe.html

Download Reference Designs 

10G MAC and XAUI PHY for Stratix IV GX Delopment Kit

 AN638_10GMAC_XAUI_HSMC_SIV_GX_ACDS-12.0sp2.qar

 

10G MAC and XAUI PHY for Stratix V GX Delopment Kit

 AN638_10GMAC_XAUI_HSMC_SV_GX_ACDS-12.0sp2.qar

 

Note: If you regenerate ETH10G.qsys file and encounter fitter error due to bonded channel placement, please follow the instruction below:

 - Search for the file altera_xcvr_xaui in folder ./ETH10G_TOP/synthesis/submodules

 - Search for the module sv_xcvr_xaui in the above file

-  Edit the bonded mode parameter: 

    + Before: xN

    + After : fb_compensation 

Version history
Last update:
‎06-26-2019 02:43 PM
Updated by:
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