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400MHz, x18, half rate QDRII+ reference design for the SIV PCIe dev kit

400MHz, x18, half rate QDRII+ reference design for the SIV PCIe dev kit



Reference design for QDRII+ on the SIV PCIe dev kit. Includes sof and signaltap file for basic demo on this kit.

www.alterawiki.com/wiki/File:SIV_PCIe_Kit_QDRII_exampleproject.zip#filehistory


Version history
Last update:
‎06-26-2019 03:02 PM
Updated by:
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