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Altera Video and Image Processing Suite Demo on VEEK

Altera Video and Image Processing Suite Demo on VEEK



See Altera's Video and Image Processing Suite running on the Video & Embedded Evaluation Kit. This includes three demos: VIP, VIP with Camera and VIP with PIP.

1. The VIP application shows a standard PAL/NTSC format video with dynamic resizing, rescaling and motion with a monochrome background.

2. The VIP Camera application demonstrates a camera input with dynamic rescaling, zooming and panning with a monochrome background.

3. The VIP PIP demo shows a PAL format video input as background on Video & Embedded Evaluation Kit display with a camera input performing dynamic resizing, panning and zooming.

4. The VIP Multi-Feed demo shows a variety of video input, including a NTSC format video, a camera and a DVI, output to a DVI Display at the same time in four-equal screen mode. 

Video & Embedded Evaluation Kit Overview

The Video & Embedded Evaluation Kit is a full-featured development platform powered by the Altera DE2-115. Sporting an Altera Cyclone IV E FPGA, as well as an 8-inch LCD touch panel and a 5 megapixel digital image sensor module, the Video & Embedded Evaluation Kit is a comprehensive design environment with everything embedded developers need to create multimedia-based systems.

For more detailed information, please visit: http://www.veek.terasic.com


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Download

Click here to download Download VIP demo

Click here to download VIP Camera demo

Click here to download VIP PIP demo

Click here to download VIP Multi-Feed demo



Click here to download SD Card files for VIP, VIP_Camera, and VIP_PIP.

Instructions: To execute SD Card files on your Video & Evaluation Kit, place your project folders in root\Application_Selector\ of your SD Card. Then, insert the SD Card into the SD slot of your VEEK. Wait for the Application Selector to load, and execute your file.


Design Descriptions

VIP demo

The VIP Design demonstrates dynamic scaling and clipping of a standard definition video stream in either national television system committee (NTSC) or phase alternation line (PAL) format with a background layer. The video stream is output in high definition resolution (800×600) over an LCD on the Video & Embedded Evaluation Kit. The example design demonstrates a framework for rapid development of video and image processing systems using the parameterizable MegaCore® functions that are available in the Video and Image Processing Suite. 

0/09/TPad_VIP_copy.png


Click here for VIP demo image:

Wiki Link: https://fpgawiki.intel.com/uploads/0/09/TPad_VIP_copy.png

DAM Link: https://www.intel.com/content/dam/altera-www/global/en_US/uploads/0/09/TPad_VIP_copy.png

VIP Camera demo

The VIP Camera Design demonstrates dynamic scaling and clipping of a video stream from the 5 megapixel CMOS sensor camera on Video & Embedded Evaluation Kit with a background layer. The video stream is output in high definition resolution (800×600) over the LCD Display on Video & Embedded Evaluation Kit. The example design demonstrates a framework for rapid development of video and image processing systems using the parameterizable MegaCore® functions that are available in the Video and Image Processing Suite. 

e/e9/VEEK_VIP_Camera.png


 Click here for VIP Camera Demo Image:

Wiki Link: https://fpgawiki.intel.com/uploads/e/e9/VEEK_VIP_Camera.png

DAM Link: https://www.intel.com/content/dam/altera-www/global/en_US/uploads/e/e9/VEEK_VIP_Camera.png


VIP PIP demo

The Altera® Video and Image Processing Example Design demonstrates dynamic scaling and clipping of a video stream from the 5 megapixel CMOS sensor camera on the Video & Embedded Evaluation Kit and picture-in-picture mixing with a background video-in of a standard definition video stream in phase alternation line (PAL) format. The video stream is output in high definition resolution (800×600) over the LCD Display on Video & Embedded Evaluation Kit. The example design demonstrates a framework for rapid development of video and image processing systems using the parameterizable MegaCore® functions that are available in the Video and Image Processing Suite.

c/cb/TPad_VIP_PIP.png


 Click here for VIP PIP Demo Image:

Wiki Link: https://fpgawiki.intel.com/uploads/c/cb/TPad_VIP_PIP.png

DAM Link: https://www.intel.com/content/dam/altera-www/global/en_US/uploads/c/cb/TPad_VIP_PIP.png

VIP Multi-Feed demo

The VIP Multi-Feed design shows four-equal 400*300 screens on a DVI display. The input source includes a 800*600 DVI input, an NTSC format video input, and a 5 megapixel 800*600 CMOS sensor camera input. The video input is duplicated and both feeds processed with two different algorithms (polyphase and bilinear scaling), so there is a distinction in quality. Then all the four inputs are mixed with a 800*600 test pattern as a background layer. The video stream is outputted in 800×600 over the DVI Display on the Video & Embedded Evaluation Kit. The example design demonstrates a framework for rapid development of video and image processing systems using the parameterizable MegaCore® functions that are available in the Video and Image Processing Suite.

b/b0/4-feed_copy.PNG

Click here for VIP Multifeed Demo Image:

Wiki Link: https://fpgawiki.intel.com/uploads/b/b0/4-feed_copy.PNG

DAM Link: https://www.intel.com/content/dam/altera-www/global/en_US/uploads/b/b0/4-feed_copy.PNG


Note: all the blocks are in the same clock domain in each picture.

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‎06-21-2019 06:53 PM
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